IEEE 1149.1-1990 Standard Test Access Port and Boundary Scan Application Note
ثبت نشده
چکیده
For sys tem or board d iagnost ics , AT6000 Series devices can be programmed with the 1149.1 standard test logic and then reprogrammed for normal operation when the diagnostics are comple te . The area and per fo rmance overhead of the test logic does not impact normal operation in the device because it is replaced by the logic for normal function. All mandatory test instructions can be executed with this portable test logic configuration, which guarantees conformance to the 1149.1 standard. The 1149.1 standard provides a consistent mechanism for confirming that each component in a system performs i ts required funct ion. Since AT6000 devices are factory-tested with test patterns that exercise all the programmable features, integrity is insured without having to rely on standard test logic. Standard test logic is best suited for check ing the interconnect ions between devices on the board. Boards are often multi-layer and double-sided, making traditional board test methods, like the bed-of-nails approach, expensive and impractical.
منابع مشابه
AN-890 P1149.1A Extensions to IEEE-STD-1149.1-1990
Since publication of IEEE-1149.1-1990/ANSI 1, 2, 3, extensions and requests for clarifications have been adopted by the IEEE 1149.1 Working Group. The original standard established a common, industry-wide methodology for the application of scan test access. The rapid acceptance of this standard and use by semiconductor designers, test engineers and systems developers has resulted in questions n...
متن کاملIntroduction to Boundary Scan Test and In-System Programming
Lattice is the leading supplier of In-System Programmable (ISPTM) devices and devices that are fully compliant with the IEEE-1149.1 testability standard. The Lattice product offering includes many devices that incorporate in-system programmability through an 1149.1 compliant test access port (TAP). The ispLSI ® 1000EA, 2000VE, 2000VL, 5000V, 8000/V, ispMACHTM 4A, 4000B/C, 5000VG, MACH ® 4 and 5...
متن کاملSynchronizing the IEEE 1149.1 Test Access Port for Chip-Level Testability
testability standard in the industry. Although its mandatory provisions focus narrowly on boardlevel assembly verification testing, primarily via the boundary-scan register, its test access port (TAP) and many optional provisions make the standard usable for a much broader range of applications. Since its inception, numerous extensions and applications have been proposed that allow the standard...
متن کاملImplementation of IEEE 1687 Standard for Access Instrumentation Using Verilog
Technology in VLSI industry has improved in accordance with moore’s law , so density of transistor in Integrated Circuit(IC) is increased . Testing this IC with the bed of nail technique becomes very difficult so solution to this was given by IEEE 1149.1 boundary scan standard also called as Joint Test Access Group(JTAG) using which interconnects between the IC mounted on PCB was tested without...
متن کاملApplication Note 1022 Boundary-Scan, Silicon and Software Enable System Level Embedded Test
Designing IC’s, boards, and systems with a DFT strategy that utilizes boundary-scan, will make a quantum improvement in test development cycle-time, and fault coverage both in production and in the field. Tools are commercially available that automate design, test development, and ultimately embedded test for IEEE 1149.1 compatible systems. This paper is intended to familiarize designers and te...
متن کاملذخیره در منابع من
با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید
عنوان ژورنال:
دوره شماره
صفحات -
تاریخ انتشار 1999